1. Field of the Disclosure
The present disclosure relates generally to electrophotographic imaging devices such as a printer or multifunction device having printing capability, and in particular to a control system for rotating the mirror of the laser scan unit thereof.
2. Description of the Related Art
Precise motor speed control is a requirement of a broad array of motor-driven applications. Traditional motor speed control is accomplished with phase-lock loop (PLL) circuitry. PLL circuitry is generally well known in the electronics and communications arts, where they are commonly used for the synthesis and regulation of high frequency, oscillating, electrical signals. PLL circuitry generally synchronizes two signals in frequency by eliminating phase errors between the two. Application of PLL circuitry to motor control systems typically includes generating a periodic signal representative of motor speed and comparing the signal to a reference signal of a desired or target frequency. The PLL circuitry attempts to match the phase, and hence frequency, of the two signals in a single control loop. Based on the phase error signal from the PLL circuitry, the voltage to the motor is increased or decreased to increase or retard its speed, respectively, so as to match the reference frequency signal.
In electrophotographic imaging devices, such as laser printers and copiers, a polygonal mirror, rotated at a substantially constant velocity, deflects one or more modulated laser beams as scan lines that are impinged onto a photoconductive drum. Some existing imaging devices utilize a mirror assembly which include the polygonal mirror, a mirror motor for rotating the polygonal mirror, one or more sensors associated with the motor for sensing the motor speed and/or position, and circuitry including PLL circuitry for use in locking onto an input reference signal. In such assemblies, the sole output signal generated by a mirror assembly is a binary lock signal which indicates whether or not the motor is at the desired speed according to the input reference signal. Electrophotographic imaging devices typically interface with mirror assemblies only through use of the reference signal input thereto and the output lock signal from the mirror assembly.
The circuitry of existing mirror assemblies includes an integrator having an operational amplifier and a passive component network. If the actual mirror motor speed is significantly above or below the target speed corresponding to the reference signal, the integrator can accumulate significant integral error.
In the situation in which the mirror motor starts from a standstill, a full acceleration current amount from the mirror assembly circuitry is provided to the mirror motor. As the motor approaches the target speed, the integrator has sufficient time during startup to add and accumulate significant integral error. Thus, as the motor approaches the target speed and accelerates in a substantially linear manner, the integrator cannot subtract the accumulated error fast enough, and the motor speed overshoots. As the motor speed overshoots the target speed, the integrator begins subtracting from the accumulated integral error. By the time the motor speed falls back into the linear operating range, the integral error has been reduced too much. As a result, the mirror motor reports an under-speed condition and begins repeating cycles of full acceleration, overshoot, undriven, and under-speed until the motor is finally able to settle into the linear operating range. This inability to relatively quickly reach a constant speed band because the energy storage in the system as well as the accumulated integral error, thereby leading to overshoot and undershoot of motor speed, is referred to as “chatter.”